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2026 顶会论文

作者位次 #7/8HPCA 2026Oral· High-Performance Computer Architecture

PADE: A Predictor-Free Sparse Attention Accelerator via Unified Execution and Stage Fusion

Huizheng Wang · Hongbin Wang · Zichuan Wang · Zhiheng Yue · Yang Wang · Chao Li · Yang Hu · Shouyi Yin

长上下文与架构OpenReview

作者位次 #7/8HPCA 2026Oral· High-Performance Computer Architecture

FACE: Fully Overlapped PD Scheduling and Multi-Level Architecture Co-Exploration on Wafer

Zheng Xu · Dehao Kong · Jiaxin Liu · Dingcheng Jiang · Xu Dai · Jinyi Deng · Yang Hu · Shouyi Yin

长上下文与架构OpenReview

作者位次 #11/12HPCA 2026Oral· High-Performance Computer Architecture

MoEntwine: Unleashing the Potential of Wafer-Scale Chips for Large-Scale Expert Parallel Inference

Xinru Tang · Jingxiang Hou · Dingcheng Jiang · Taiquan Wei · Jiaxin Liu · Jinyi Deng · Huizheng Wang · Qize Yang · Haoran Shang · Chao Li · Yang Hu · Shouyi Yin

效率与系统长上下文与架构OpenReview

作者位次 #10/11HPCA 2026Oral· High-Performance Computer Architecture

TEMP: A Memory Efficient Physical-Aware Tensor Partition-Mapping Framework on Wafer-Scale Chips

Huizheng Wang · Taiquan Wei · Zichuan Wang · Dingcheng Jiang · Qize Yang · Jiaxin Liu · Jingxiang Hou · Chao Li · Jinyi Deng · Yang Hu · Shouyi Yin

效率与系统检索与知识长上下文与架构OpenReview

作者位次 #9/10HPCA 2026Oral· High-Performance Computer Architecture

ReThermal: Co-Design of Thermal-Aware Static and Dynamic Scheduling for LLM Training on Liquid-Cooled Wafer-Scale Chips

Chengran Li · Huizheng Wang · Jiaxin Liu · Jingyao Liu · Zhiheng Yue · Xia Li · Shenfei Jiang · Jinyi Deng · Yang Hu · Shouyi Yin

长上下文与架构OpenReview

作者位次 #7/9HPCA 2026Oral· High-Performance Computer Architecture

HR-DCIM: High-Reliability Floating-Point Digital CIM Architecture With Unified Low-Cost Iterative Error Correction

Zhen He · Yiqi Wang · Zhiheng Yue · Zihan Wu · Huiming Han · Shaojun Wei · Yang Hu · Fengbin Tu · Shouyi Yin

长上下文与架构OpenReview

作者位次 #7/8HPCA 2026Oral· High-Performance Computer Architecture

WATOS: Efficient LLM Training Strategies and Architecture Co-Exploration for Wafer-Scale Chip

Huizheng Wang · Zichuan Wang · Hongbin Wang · Jingxiang Hou · Taiquan Wei · Chao Li · Yang Hu · Shouyi Yin

效率与系统长上下文与架构OpenReview

作者位次 #2/5FOCS 2026Oral· Algorithms & Complexity Theory

Dynamic Entropy-Encoded Arrays in O(1) Time with Nearly Optimal Space

Guy E. Blelloch · Yang Hu · William Kuszmaul · Tianxiao Li · Renfei Zhou

理论与学习动力学OpenReview

作者位次 #3/6FOCS 2026Oral· Algorithms & Complexity Theory

k-Clustering via Iterative Randomized Rounding

Jarosław Byrka · Yuhao Guo · Yang Hu · Shi Li · Chengzhang Wan · Zaixuan Wang

理论与学习动力学OpenReview

作者位次 #7/8MICRO 2026Oral· Thermal-Aware 3D-Stacked LLM Accelerators

CrossSpec: A Draft–Verify Aggregated 3D LLM Accelerator with Thermal-Aware Cross Floorplan and Stack-Layer-wise Dynamic Refresh for Parallel Speculative Decoding

Yutong Su · Huanyu Wang · Ruikang Guo · Mengfei Shen · Huiming Han · Yang Wang · Yang Hu · Shouyi Yin

效率与系统代码OpenReview

作者位次 #7/8MICRO 2026Oral· Thermal-Aware 3D-Stacked LLM Accelerators

TESSA: A Thermal-Centric, Sensor-Free Framework with Spatially-Aware Elastic Execution for 3D-Stacked-DRAM-Based LLM Accelerators

Huanyu Wang · Yang Wang · Yutong Su · Jiaxin Yang · Junan Lu · Huiming Han · Yang Hu · Shouyi Yin

OpenReview

作者位次 #7/10MICRO 2026Oral· Energy-Constrained & Fault-Tolerant Systems

Enhancing the Efficiency of Embodied AI System with Squeezed Analog Perception

Cheng Xu · Xiaofeng Hou · Chao Li · Chenhe Yuan · Jinyang Guo · Xinkai Wang · Yang Hu · Yu Feng · Dimitris Gizopoulos · Minyi Guo

效率与系统OpenReview

Yang Hu

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2026 顶会论文

PADE: A Predictor-Free Sparse Attention Accelerator via Unified Execution and Stage Fusion

FACE: Fully Overlapped PD Scheduling and Multi-Level Architecture Co-Exploration on Wafer

MoEntwine: Unleashing the Potential of Wafer-Scale Chips for Large-Scale Expert Parallel Inference

TEMP: A Memory Efficient Physical-Aware Tensor Partition-Mapping Framework on Wafer-Scale Chips

ReThermal: Co-Design of Thermal-Aware Static and Dynamic Scheduling for LLM Training on Liquid-Cooled Wafer-Scale Chips

HR-DCIM: High-Reliability Floating-Point Digital CIM Architecture With Unified Low-Cost Iterative Error Correction

WATOS: Efficient LLM Training Strategies and Architecture Co-Exploration for Wafer-Scale Chip

Dynamic Entropy-Encoded Arrays in O(1) Time with Nearly Optimal Space

k-Clustering via Iterative Randomized Rounding

CrossSpec: A Draft–Verify Aggregated 3D LLM Accelerator with Thermal-Aware Cross Floorplan and Stack-Layer-wise Dynamic Refresh for Parallel Speculative Decoding

TESSA: A Thermal-Centric, Sensor-Free Framework with Spatially-Aware Elastic Execution for 3D-Stacked-DRAM-Based LLM Accelerators

Enhancing the Efficiency of Embodied AI System with Squeezed Analog Perception

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